器件名称

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产品SN7476贸泽
描述

The '76 contains two independent J-K flip-flops with individual J-K clock preset and clear inputs. The '76 is a positive-edge-triggered flip-flop. J-K input is loaded into the master while the clock is high and transferred to the slave on the high-to-low transition. For these devices the J and K inputs must be stable while the clock is high.

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器件类型,半导体,集成电路(IC)

半导体

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